State diagramming environments provide design tools for modeling and simulating event driven systems and subsystems. State diagrams enable the graphical representation of hierarchical and parallel states and the event driven transitions between them. The state diagrams include both logic and internal data. State diagrams can be used to visually detect a current state during the operation of the system being modeled. An example of a state diagramming environment is STATEFLOW from The MathWorks, Inc. of Natick, Mass.
A state diagram may be used to represent finite state machines. Finite state machines may be used to represent event based systems. An example of an event based system may be an electric circuit that has memory. In this manner, a finite state machine may be used in the design of a sequential circuit, which in general, is a circuit that uses combinational logic and a memory component. The output and next state of a finite state machine may be a function of the present state of and/or the inputs to the finite state machine.
Generally, there are three main types of finite state machines that are used to develop a synchronous sequential circuit, a Moore machine, a Mealy machine and a generic state machine. Currently, environments for developing state diagram representations of finite state machines using Mealy and Moore machines are insufficient for notifying a user when the user does not conform to Moore or Mealy machine semantics. As a result, a large burden on a user especially with increased complexity and size of the finite state machine. Debugging these finite state machines requires a substantial amount of the user's time.